The present invention relates generally to improvements in reference-voltage sources, more particularly to voltage-reference circuits for emulating the voltage at certain points in an integrated circuit, and especially to a circuit which accurately replicates the base-emitter voltage of a saturated PNP transistor. Such a circuit has several significant applications in the field of memory devices and other integrated circuits.
The dominant process technology in bipolar semiconductor devices today is the NPN process, which results in vertical formation of NPN transistors and lateral formation of PNP transistors on a substrate. For reasons which do not concern the present invention, a consequence of the use of this process technology is that the replication of NPN terminal voltages for use in a reference-voltage source is easy, while the replication of PNP terminal voltages is much more difficult.
One particularly important application for a reference-voltage source arises in the use of a differential sense amplifier to read the data stored in a memory cell. In order to optimize the speed of reading such data, the sense amplifier needs to be able to respond to very small difference voltages, and for this purpose it needs a reference voltage which is accurately tailored to the voltage levels to be sensed. When the memory cell utilizes only NPN transistors, the task of deriving a suitable voltage reference is relatively straightforward.
However, when the memory device is of the sort which uses silicon-controlled rectifiers (SCRs) as the active devices of its core cells as is sometimes the case, the problem of providing an accurate reference voltage for sense operations is more difficult. As will become apparent in the later detailed description of this invention, the use of the SCR device causes a PNP transistor to be included in each branch of the core cell. Consequently, the reference voltage source needs to be able to successfully replicate the voltage between the base and emitter of this transistor when it is in a saturated condition.
As will also be discussed in more detail later, one method of sensing the data stored in a memory cell involves establishing a sense-level voltage which is intermediate between the voltage levels used to represent logic 1 and 0. In an important application of this method to the sensing of a type of memory cell using SCRs as core-cell elements, the logic 1 and 0 voltage levels differ from one another by the base-emitter drop of a saturated PNP transistor in the core cell. Accordingly, the generation of a suitable sense-level voltage requires that the reference-voltage source successfully replicate the base-emitter voltage of this saturated PNP transistor.
Although myriad designs of voltage-reference sources have been proposed for various purposes, they are generally unsuitable in the critical applications for which the present invention is intended for a variety of reasons. In general, they lack the ability to accurately duplicate, under all operational conditions, the voltage level from which deviations must be sensed. This failure is in many cases due to reliance upon reference-voltage-establishing circuit elements which do not have exactly the same voltage-current characteristics as are present in the memory cell or other source of measured voltage.